IBIS Macromodel Task Group

Meeting date: 1 May 2007

Members (asterisk for those attending):
* Ambrish Varma, Cadence Design Systems
* Arpad Muranyi, Intel Corp.
  Barry Katz, SiSoft
* Bob Ross, Teraspeed Consulting Group
* Doug White, Cisco Systems
* Essaid Bensoudane, ST Microelectronics
  Ganesh Narayanaswamy, ST Micro
  Hemant Shah, Cadence Design Systems
  Ian Dodd, Mentor Graphics
  Joe Abler, IBM
* John Angulo, Mentor Graphics
  John Shields, Mentor Graphics
  Ken Willis, Cadence Design Systems
  Kumar, Cadence Design Systems
  Lance Wang, Cadence Design Systems
  Luis Boluna, Cisco
* Michael Mirmak, Intel Corp.
* Mike LaBonte, Cisco Systems
* Mike Steinberger, SiSoft
  Patrick O'Halloran, Tiburon Design Automation
  Paul Fernando, NCSU
* Radek Biernacki, Agilent (EESof)
* Randy Wolff, Micron Technology
* Ray Komow, Cadence Design Systems
  Richard Ward, Texas Instruments
  Sanjeev Gupta, Agilent
  Shangli Wu, Cadence
  Stephen Scearce, Cisco Systems
  Syed Huq, Cisco Systems
  Syed Sadeghi, ST Micro
* Todd Westerhoff, SiSoft
  Vikas Gupta, Xilinx
  Vuk Borich, Agilent
  Walter Katz, SiSoft

--------------------------
Call for patent disclosure:

No one declared a patent.
Michael Mirmak said there has been news about patents, look for open
forum discussion on this.

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Opens:

-------------
Review of ARs:

- Arpad: Review the new macro library files.
  TBD

- Arpad: Write parameter passing syntax proposal for a possible BIRD
  TBD

-------------
New Discussion:

Todd presented draft BIRD status for the EDA vendors:
- The document has grown
  - Discussion in the back on how these models are used by EDA platforms
  - Contains detailed flows
- Now contains a list of parameters we want to standardize
  - Ambrish: This is not a complete list, just "uncontroversial" parameters
  - Todd: it has most parameters that were discussed
- New "description" section contains descriptions for user-defined parameters
  - Mike LaBonte: "description" should be a standard field attchaed to
    all parameters
  - Todd: line length limit makes appending this impractical
  - Mike LaBonte: description could appear on following lines

Mike Steinberger described the "software" section:
- Walk-through of application scenarios, software issues
- There was confusion over numbering between TOC outline and actual text
  - Outline entries look like section headers
  - Numbering appears to jump from 1.6 to 1.1
- Errors found in the last items of 1.2
- Some changes have been made by separate individuals, and not
  yet compiled into a mutually agreed version
- This section needs to be clearly labeled as a software section
- It needs to become a part of the official IBIS spec, not just BIRD text
- Arpad: is this C-specific? Would prefer a more modern language
  - Mike Steinberger:
    - Wrappers can be written in any language
    - PERL would be easy
  - Arpad: the choice of language is not insignificant
  - Michael Mirmak: we should document any part of spec that is
    language specific
- Radek:
  - If models are interpreted it will slow down the simulator
  - Mike Steinberger:
    - PERL can be very fast for skilled programmers
    - Most time would be spent in compiled code
  - Todd:
    - Some languages do not release memory the same way
    - Spec as written calls for constructors and destructors
    - PERL and other interpreters usually defer memory release until
      grabage collection
  - Arpad are the different flavors of C++ compatible (.net 1, 2, etc.)
    - Mike Steinberger:
      - it depends on the standard libraries used
      - ANSI is a solid standard
      - other function should be linked in
- Mike LaBonte: IBIS spec has 9 sections, this would be section 10

AR: EDA vendors change BIRD to show separation between TOC and text
AR: EDA vendors change BIRD to make AMI section part of IBIS spec section 10

Next meeting: 15 May 2007 12:00pm PT